Pre-silicon Validation Engineer Resume Sample
Rosie Rodriguez
38998 Goldner Falls,
Chicago,
IL
+1 (555) 844 0072
Work Experience
Senior Pre-silicon Validation Engineer
05/2018
-
PRESENT
Phoenix, AZ
- Efficient with various pre silicon validation techniques and have strong working knowledge in system Verilog
- Involving in RTL logic design (in System Verilog, Verilog and other Hardware description language)
- Experience of logic design and/or validation techniques
- Experience with processor architecture and micro-architecture
- Leading a small team of engineers through any of the above. - Working in a very team-oriented environment and interacting with engineers from other design disciplines
- Pre-si verification work using a validation methodology such as UVM, Specman E, VMM, AVM
- Defining and developing testbench, enhancing verification flow and methodologies for validation environment
Pre-silicon Validation Engineer
02/2015
-
12/2017
San Francisco, CA
- Developing verification collaterals such as scoreboard, behavioral model, tracker/checker, automated tools for the validation needs
- Validating the functionality of RTL design by developing testplan, tests sequences, coverage point or test tools
- Working closely with silicon architect and designer, influencing design definition and implementation
- Working closely with other verification engineers, RTL design engineers, micro-architects, and other team members to ensure quality of test-plans, verification environment, and tests
- Experience with any combination of the following: System Verilog, System C and or C++ as a verification tool or Specman E required
- Relevant experience with development of Pre-Silicon validation environments
- BSEE/BSCE/MSEE/MSCE with 7+ years of experience in SOC/ASIC implementation of varied complexities & flow/methodology development
- Validation experience
Pre Silicon Validation Engineer
01/2009
-
12/2014
Los Angeles, CA
- Pre-silicon validation experience
- Experience in design or validation on at least one Ethernet product
- Able to write tests and develop coverage point for validation purpose based on high level Architecture spec
- Proficiency in Programming language (Perl, C++, or Java)
- Experience in functional validation
- Experience in working with Verilog/SVTB and OVM/UVM would be an added advantage
- Familiarity with CPU architecture would be an added advantage
- Experience in pre-silicon validation ( 2-6 years). -Experience in System Verilog and OVM methodology. -PHY/SerDes experience- advantage. -Ethernet protocol knowledge (of the lower layers) - advantage. -Creativity and team work
Education
Belmont University
2005 - 2009
Bachelor's Degree in Electrical
Professional Skills
- Creates and executes test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests
- Strong analyzing and debugging skill, creative in problem solving
- Strong analytical and debugging skill, and creative in problem solving
- Experienced in developing testplan, tests contents and coverage points for validation purpose based on High Level Architecture spec
- Strong programming skill in Perl, C++, Tcl and etc
- Experience with analog circuits is not required but is desired since much of the validation revolves around the analog design of clocking circuits
- +5 years of experience in pre SI validation
How to write Pre-silicon Validation Engineer Resume
Pre-silicon Validation Engineer role is responsible for design, software, circuits, programming, digital, architecture, languages, debugging, creative, communications.
To write great resume for pre-silicon validation engineer job, your resume must include:
- Your contact information
- Work experience
- Education
- Skill listing
Contact Information For Pre-silicon Validation Engineer Resume
The section contact information is important in your pre-silicon validation engineer resume. The recruiter has to be able to contact you ASAP if they like to offer you the job. This is why you need to provide your:
- First and last name
- Telephone number
Work Experience in Your Pre-silicon Validation Engineer Resume
The section work experience is an essential part of your pre-silicon validation engineer resume. It’s the one thing the recruiter really cares about and pays the most attention to.
This section, however, is not just a list of your previous pre-silicon validation engineer responsibilities. It's meant to present you as a wholesome candidate by showcasing your relevant accomplishments and should be tailored specifically to the particular pre-silicon validation engineer position you're applying to.
The work experience section should be the detailed summary of your latest 3 or 4 positions.
Representative Pre-silicon Validation Engineer resume experience can include:
- Debug skills/tools (e.g. Verdi) is also desired
- Experience in System Verilog, OVM/UVM, RTL model build or testbench development
- Experience in the pre-Silicon verification of complex digital and/or mixed signal designs
- Understanding of signal processing, transmission line theory and communication systems
- Understanding of computer
- General programming and scripting using C++, Perl, etc
Education on a Pre-silicon Validation Engineer Resume
Make sure to make education a priority on your pre-silicon validation engineer resume. If you’ve been working for a few years and have a few solid positions to show, put your education after your pre-silicon validation engineer experience. For example, if you have a Ph.D in Neuroscience and a Master's in the same sphere, just list your Ph.D. Besides the doctorate, Master’s degrees go next, followed by Bachelor’s and finally, Associate’s degree.
Additional details to include:
- School you graduated from
- Major/ minor
- Year of graduation
- Location of school
These are the four additional pieces of information you should mention when listing your education on your resume.
Professional Skills in Pre-silicon Validation Engineer Resume
When listing skills on your pre-silicon validation engineer resume, remember always to be honest about your level of ability. Include the Skills section after experience.
Present the most important skills in your resume, there's a list of typical pre-silicon validation engineer skills:
- Solid problem solving, debugging, and written/verbal communications skills
- Extensive experience with architecting verification environments and components random test generators, scoreboards, BFM's, coverage, etc
- Proven knowledge of System Verilog, OVM/UVM, object-oriented programming
- Strong understanding of logic design and micro-architecture fundamentals
- Experience in PC Architecture
- Experienced in VLSI or Structural and Physical design flow/methodology
List of Typical Skills For a Pre-silicon Validation Engineer Resume
1
Skills For Senior Pre-silicon Validation Engineer Resume
- Experienced in USB, PCI express or any Industrial standard bus protocol would be added value
- Knowledge in digital PHY- advantage
- Bs.c or Ms.c in Electrical Engineering.+5 years of experience in pre SI validation-Creativity and team work.-knowledge in System-Verilog - advantage.-knowledge in OVM/UVM methodology - advantage.- Knowledge in digital PHY- advantage
- MS in EE/CS and 3+ years of relevant experience
- Strong knowledge of SIP tools and methodologies like Saola, ACE, VCS, etc
- Bs.c or Ms.c in Electrical Engineering.+7 years of experience in pre SI validation-Creativity and team work.-knowledge in System-Verilog - advantage.-knowledge in OVM/UVM methodology - advantage.- Knowledge in digital PHY- advantage
2
Skills For Experienced Pre-silicon Validation Engineer CPV Jerusalem Resume
- Excellent written and verbal communications skills and demonstrated ability to work effectively in a team environment
- Experience in the pre-Silicon validation of complex digital and/or mixed signal designs
- Experience and working knowledge in several of the following areas
- Debug skills/tools (e.g. Verdi) is also desired. Experience with analog circuits is not required but is desired since much of the validation revolves around the analog design of clocking circuits
- System Verilog coding for verification, verification methodologies e.g. OVM/UVM and environments including BFM's, monitors, checkers, scoreboards, test-plan development and test case implementation
- System Verilog UVM/OVM based validation and environment development
- IO/PHY validation and protocols e.g. PCIE, USB, SATA, DP, TBT, HDMI, GBE
3
Skills For Pre Silicon Validation Engineer Resume
- C code based validation in processor based environments
- Mixed signal validation
- Gate level validation
- IP level validation
- Functional coverage and assertions, design RTL debug,
- Implementation of checkers and bus functional models
- Experience in pre-silicon verification with various tools and methodologies including but not limited to: System Verilog, Perl/Shell scripting, VCS/Synopsys simulators, interactive debugger, RTL model build, testbench development, power-aware simulation, design-for-test, design-for-verification, coverage-based random constraint simulation
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