Asic Design Engineer Resume Sample

4.9
21 votes
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Johnson Powlowski
5647 Joanie Islands,  New York,  NY
+1 (555) 977 6099

Work Experience


Senior Asic Design Engineer
07/2015 - PRESENT
San Francisco, CA
  • Looking for Senior & Lead ASIC Design engineers with 5-15 years of industry experience and backgrounds in high speed DRAM and/or processor design (ie Graphics, Microprocessors, Network Processors, or Mobile / Multimedia SOCs)
  • Strong working knowledge of Verilog or VHDL
  • Experience with high speed clocking
  • Familiarity with board and system level issues
  • Experience in behavioral and RTL coding using Verilog
  • Knowledge of signal processing, channel equalization
  • Develop hardware design architecture and microarchitecture
  • Perform RTL coding, synthesis and static timing analysis
Asic Design Engineer
04/2012 - 01/2015
Detroit, MI
  • 49 7121 352763
  • ASIC/FPGA simulation and verification
  • System Verilog, Verilog, and scripting languages such as Python or Perl
  • Writing test benches and tests using System Verilog hardware verification language
  • Lab debugging and testing
  • Excellent knowledge of design verification methodology, such as OVM/UVM, systemverilog
  • Good communication skill and fluent English
  • Good team player and strong sense of responsibility to deliver on time
  • Work with Chip/IP architect to define macro-architecture specification for sub-blocks
Junior Asic Design Engineer
02/2007 - 12/2011
Philadelphia, PA
  • Perform post-silicon validation and debug as needed
  • Several iterations of experience in the IC design/verification flow from RTL to GDSII
  • Fluency with Verilog or SystemVerilog
  • High speed digital communications
  • Proficiency with matching high-level model and RTL functionality
  • Fluency with scripting in Python, TCL, and/or Perl
  • Experience with low power implementation, synthesis, formal verification, and static timing analysis
  • Experience with validation, lab equipment usage and debug, and signal integrity analysis
  • Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs desirable

Education


Kettering University
2003 - 2007
Engineer's Degree in Electrical Engineering

Professional Skills


  • Demonstrated analytic problem-solving skills
  • Strong problem solving skills, and attention to details
  • Strong mixed-signal IC design skills
  • Strong synthesis and static timing analysis skills required
  • Strong Verilog/SystemVerilog skills required
  • Strong SystemC/C/C++ and Perl/shell script skills desired
  • Excellent communication skills to collaborate with cross-cultural teams and work in a matrix organization

How to write Asic Design Engineer Resume

Asic Design Engineer role is responsible for design, player, asic, digital, interpersonal, assembly, eda, english, organization, circuits.
To write great resume for asic design engineer job, your resume must include:

  • Your contact information
  • Work experience
  • Education
  • Skill listing

Contact Information For Asic Design Engineer Resume

The section contact information is important in your asic design engineer resume. The recruiter has to be able to contact you ASAP if they like to offer you the job. This is why you need to provide your:

  • First and last name
  • Email
  • Telephone number

Work Experience in Your Asic Design Engineer Resume

The section work experience is an essential part of your asic design engineer resume. It’s the one thing the recruiter really cares about and pays the most attention to.
This section, however, is not just a list of your previous asic design engineer responsibilities. It's meant to present you as a wholesome candidate by showcasing your relevant accomplishments and should be tailored specifically to the particular asic design engineer position you're applying to. The work experience section should be the detailed summary of your latest 3 or 4 positions.

Representative Asic Design Engineer resume experience can include:

  • Strong ASIC design skills
  • Strong task-based organization skills
  • Strong communications skills are required along with the ability to work in a dynamic product oriented team
  • Good communication skills, self-motivation and teamwork are required
  • Strong analog IC design skills
  • BS 8+ years working experience, MS 5+ years working experience

Education on an Asic Design Engineer Resume

Make sure to make education a priority on your asic design engineer resume. If you’ve been working for a few years and have a few solid positions to show, put your education after your asic design engineer experience. For example, if you have a Ph.D in Neuroscience and a Master's in the same sphere, just list your Ph.D. Besides the doctorate, Master’s degrees go next, followed by Bachelor’s and finally, Associate’s degree.

Additional details to include:

  • School you graduated from
  • Major/ minor
  • Year of graduation
  • Location of school

These are the four additional pieces of information you should mention when listing your education on your resume.

Professional Skills in Asic Design Engineer Resume

When listing skills on your asic design engineer resume, remember always to be honest about your level of ability. Include the Skills section after experience.

Present the most important skills in your resume, there's a list of typical asic design engineer skills:

  • Good communication skill and fluent EnglishGood team player and strong sense of responsibility to deliver on time
  • Good Communication skills with ability and desire to work as a good team player
  • Self-motivated, team building, and excellent communication skills
  • Working with system and design validation teams during bringup and design validation test phases
  • Create verification & silicon validation plans. Silicon bring up, validation, and debugging
  • Experience with designing an IC from concept to product launch, including design validation and characterization

List of Typical Experience For an Asic Design Engineer Resume

1

Experience For Senior Asic Design Engineer Resume

  • Digital simulation and verification skills
  • Synopsys VCS, Verdi and Spyglass, micro-architecture, and ASIC design skills
  • Perform test development, simulation, debugging, system bring-up, and system validation
  • Communication with verification team to achieve good coverage
  • Strong teamwork and communication is required
2

Experience For Digital Asic Design Engineer Resume

  • FPGA design experience to verify large scale ASIC
  • Experience in UVM verification methodology and use of DPI for System C, C++, C models integration
  • Disciplined, strong drive for excellence, and quality-minded
  • MSEE/BSEE with at least 5 years of relevant experience
  • Verilog and/or SystemVerilog experience
  • Support validation and product launch activities for new devices
  • FPGA/Silicon/System validation, debug
3

Experience For Principal Asic Design Engineer Resume

  • ASIC development experience
  • ASIC design experience
  • Familiar with digital IC design methodologies, understands all stages of ASIC design flows, and is experienced with state-of-the-art design tools
  • Excellent grasp of System Verilog
  • Lab support of the chip as it progresses through validation
  • Meaningful industry experience in processor design and verification (ie Graphics, Microprocessors, Network Processors, or Mobile / Multimedia SOCs)
4

Experience For MTS Asic Design Engineer Resume

  • Experience in ASIC design, verification or implementation
  • Experience in physical aware synthesis methodology and tools
  • Experience on multi-million Gate and complex design with multiple clocks and power domains
  • Experience in gate level simulation debug
  • Extensive verification of designs prior to release
  • Demonstrated proficiency with IC CAD tools
5

Experience For Lead Asic Design Engineer Resume

  • Experience with lab measurement equipment
  • PCIe domain experience and expertise
  • Good grasp of C++
  • Experience in the ASIC design flow with front-end tools
  • Defining, designing, building and verifying new circuits and ASICs
  • Understanding of the entire design process including functional verification, debugging, LINT, CDC, timing closure
6

Experience For Ethernet Asic Design Engineer Resume

  • Participating in chip bring-up and testing
  • Integrating and interfacing with high performance analog measurement circuits, employing mixed signal technologies to verify functional and parametric quality
  • Considering and reporting results for key design metrics, such as area, power, and performance
  • Suggesting and executing your portion of development, bringup and test plans
  • Developing and maintaining internal specifications
7

Experience For Junior Asic Design Engineer Resume

  • Evaluating synthesis and timing analysis results
  • Producing and maintaining drawings and specifications
  • Meeting and exceeding customer requirements and expectations on schedule and in budget
  • Learning about in-house and supplier manufacturing technologies
  • Working with cross functional teams such as Firmware and Systems Engineering to deliver verified systems
  • Writing RTL (Verilog) and unit simulation tests
8

Experience For Senior Fpga / Asic Design Engineer Resume

  • Working closely with assigned members of the verification team
  • Supporting diagnostic and test teams to achieve fault isolation, and function and robustness test
  • Developing front-end methodologies and tool flows
  • Learning about customer systems where our parts are used
  • Networking concept and protocols knowledge
  • Coding C-wrappers, C-functions for C-vs-RTL simulations
9

Experience For Camera Asic Design Engineer Resume

  • Developing micro-architecture spec and implement design blocks in Verilog
  • Driving block through the design flow in preparation for synthesis
  • Advancing Keysight’s design and characterization capabilities
  • Writing documentation and specs
  • Writing RTL in Verilog
10

Experience For Senior Digital Asic Design Engineer Resume

  • Developing ASIC chip level architecture/microarchitecture specifications
  • Perform design integration, insertion, synthesis, equivalency checking, timing analysis and closure including defining constraints
  • Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages
  • ASIC design including writing implementation specification, HLSC development, RTL writing and block level verification/debug
  • Perform logic synthesis, static timing analysis, and bus interface timing analysis to endure designs meet timing requirements

List of Typical Skills For an Asic Design Engineer Resume

1

Skills For Senior Asic Design Engineer Resume

  • Experience in executive written and verbal communication skills; mastery in English and local language
  • Experience with or a good understanding of analog/mixed signal simulations SPICE/AMS
  • Proven experience in Python, Tcl, or similar scripting tools
  • Strong EE fundamentals with experience in VLSI/ASIC Design, digital logic, digital architectures/systems, and signal processing
  • Synthesis and static/dynamic timing analysis skills
  • Establish good understanding of the system-level application of the design-under-test, for effective and quality verification coverage
2

Skills For Digital Asic Design Engineer Resume

  • Experience in UNIX and strong scripting capabilities, Perl, TCL, shell, etc
  • Proven hands-on experience with SOC ASIC and IPs design
  • +6 years experience in digital design ASIC/FPGA experience
  • Communicate effectively across many internal groups
  • MS + 12 years’ experience, or Ph.D. + 10 years' experience
  • Working knowledge with UNIX/Linux environment, and C/C++ and scripting programming skill (e.g. Perl, TCL, c-shell)
  • Working experience in advanced nodes like 16nm and 7nm from timing closure and signoff extraction corners
3

Skills For Principal Asic Design Engineer Resume

  • Networking experience is highly desirable
  • Defining tools and methodologies to increase productivity, quality, and effectiveness
  • Strong understanding of hardware design, design verification, timing analysis, clock domain crossing, and lint
  • Experience in planning and establishing requirements for verification procedures and establishing lifetime reliability
  • Direct experience with integrating IPs and cross-functioning with IP teams
  • 6+ months working circuit design convergence using industry standard design and validation tools
  • Experience with developing limits for probe testing
  • Strong understanding of fundamental mechanical engineering principles in all areas, and ability to apply principles flexibly in unfamiliar situations
4

Skills For MTS Asic Design Engineer Resume

  • Systems experience in characterizing performance, doing comparison studies, and
  • Experience with ASIC development including architectural definition, and detailed design implementation and functional verification using SystemVerilog
  • Experience in developing automated, self-checking test benches
  • Experience with Perl/Python (or similar scripting language) and C/C++ programming language
  • Strong understanding of synthesis and timing concepts
  • Experience with RTL coding, synthesis, STA (Static Timing Analysis), LEC (Logical Equivalence Check)
  • BS in Electrical Engineering/Computer Engineering and at least 10 years of experience in ASIC/SOC design
  • Hands on experience in synthesis, equivalence checking, STA, timing closure, and power analysis in Cadence/Synopsys design environments
  • In depth understanding of product development on leading edge process technologies with hands on experience with advanced process technologies
5

Skills For Lead Asic Design Engineer Resume

  • Experienced in Synthesis using Synopsys Design Compiler
  • Experienced with verilog design language, Verilog simulator and waveform debugging tools
  • Experience working on ASIC development
  • Experience in going through several complete and successful ASIC design cycles from architecture to production required
  • Or more networking ASIC experience
  • Strong tracking record of ASIC design from concept to mass production
  • Experience of high performance ASIC design from specification to system bringing up
  • Experience with RTL coding, synthesis, STA, LEC
6

Skills For Ethernet Asic Design Engineer Resume

  • FPGA development experience using Intel/Altera Quartus II software or Xilinx Vivado
  • Extensive RTL experience including design, verification, and synthesis
  • Experience with industry standard simulation, waveform debugging
  • Experience and Knowledge: Know how concerning ASIC design for Mixed-Signal-Design and analog Design
  • Qualifications: Excellent understanding of digital design techniques and methodologies such as VHDL, Synthesis and Verification
  • Experience and Knowledge: Know-how concerning ASIC-design for Mixed-Signal-Design and analog Design
  • Experience in timing constraints and closure on high speed, low power designs
7

Skills For Junior Asic Design Engineer Resume

  • Experience with developing ASIC controllers for storage
  • Knowledge and experience with FPGA prototyping (HAPS)
  • Excellent command of English as a working language
  • Work independently with limited supervision, strong sense of work planning and on-time delivery
  • Good understanding of computer architecture, logic design and VLSI design
  • Experience of high performance ASIC design from specification to system bring up
  • Experience in RTL design using SystemVerilog interfaces and understand design hotspots
  • Clock-Structure design, Synthesis/STA Constraint modelling/validation
  • Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies
8

Skills For Senior Fpga / Asic Design Engineer Resume

  • MSEE in Electrical / Computer Engineering with 0-2 years of experience
  • Good understanding of digital electronics, VLSI/ASIC design, and logic design
  • Knowledge and experience in using hardware description languages like Verilog/System Verilog
  • Knowledge/Experience of handling logic with multiple clock domains
  • Experience in SoC, embedded CPU and bus architectures, networking and control interfaces
  • Experience in Communications/DSP and packet processing architectures, and efficient implementations
  • Hands-on experience with Logic Synthesis, Automated Place-and-Route, Physical Verification (LVS/DRC) and Static Timing Analysis (STA)
9

Skills For Camera Asic Design Engineer Resume

  • Previous experience with scripting languages like Perl, Python, TCL, Make or Shell
  • Self-Starter: Demonstrated ability to learn and apply new concepts quickly
  • Experience with DFT design and methodology such as JTAG/IEEE standards, Scan/ATPG, memory BIST/repair or logic BIST
  • Perform design tradeoff analysis - leakage, dynamic power, die size, schedule, resource, priority, etc
  • Knowledge and experience with big SoC designs based on ARM/ARC and hierarchical interconnect
10

Skills For Senior Digital Asic Design Engineer Resume

  • Experience with front/back end design and verification
  • Experience with VCS, Verdi and Spyglass
  • Hands on experience in all aspects of the ASIC development process with proficiency in front-end tools and methodologies
  • Experience or knowledge of system architecture, CPU & IP integration, power and clock domains
  • Experience with Design Compiler and PrimeTime
  • Experience with memory system design DDR4/DDR5/LPDDRx
  • Effective schematic capture, and behavioral modeling of circuits in Verilog, as well as logical equivalence verification between schematic and Verilog models
  • Experience in ASIC Design

List of Typical Responsibilities For an Asic Design Engineer Resume

1

Responsibilities For Senior Asic Design Engineer Resume

  • Good knowledge and experience in using hardware description languages, like, Verilog/SystemVerilog
  • Strong RTL design capability and has experience on large digital ASIC product
  • Hands-on experience on Verilog HDL and good at algorithms
  • Solid working experience with synthesis, power, performance and verification team to develop and deliver high quality RTL design on-time
  • Experience in FPGA emulation, lab debug and silicon validation
  • Work experience and experience with at least 3 ASICs in high volume production
  • Knowledge of UNIX-based EDA tool skills and in-depth knowledge of ASIC design flows
  • Experience (or an equivalent combination of education and experience) with Verilog RTL design
2

Responsibilities For Digital Asic Design Engineer Resume

  • Strong experience in Verilog or system Verilog RTL design is required
  • Proven hands on experience with UFS (MIPI+UNIPRO), PCIe, DDR and NAND flash interfaces is an advantage
  • Very Good understanding of Computer architecture, Microprocessor, Digital electronics, VLSI/ASIC design, and Logic design
  • Demonstrate a passion for quality and ensure all exacting standards and requirements are met
  • Strong track record of ASIC design from concept to mass production
3

Responsibilities For Principal Asic Design Engineer Resume

  • Hands on experience on formal verification using Formality/LEC
  • Experience in low power and high speed design architectures, implementation trade-offs, and design for test (DFT)
  • Experience with System Verilog
  • Related experiences
  • Experience in digital logic design
  • A proven track record of high performance designs in high volume production for low power applications
  • Proven track record of RTL design on large complex designs
  • Work experience in front-end ASIC implementation and design
  • Experience on low power design flow and methodology
4

Responsibilities For MTS Asic Design Engineer Resume

  • > 5ys experience in analog circuits design
  • Strong knowledge of ASIC Design methodology required
  • 0-2years of experience in ASIC Design
  • Design experience (Architecture, RTL, synthesis, gate-level/SDF simulation, etc)
  • Experience with CMOS and bipolar processes
  • Experience with design of analog circuits with connections to digital components for communication and configuration
  • Experience in ASIC verification, formal verification and/or physical design/implementation desired
  • Strong ability to read and interpreting DSP specifications
  • Direct experience with digital flow from C++ to synthesis
5

Responsibilities For Lead Asic Design Engineer Resume

  • Hands-on experience in measurement products and systems
  • Digital design experience
  • Experience with modern version control systems such as git and mercurial
  • Relevant STA experience in STA
  • Demonstrated knowledge of DDR memory technology: DDR4/5. LPDDR3/4, HBM
  • LINT and CDC check experience is required
  • Experience in Verilog/System-verilog
  • Languages: good knowledge of English
6

Responsibilities For Ethernet Asic Design Engineer Resume

  • Experience with either Cadence NC system Verilog tools, Mentor Questa tools, or Synopsys vcs simulators
  • BS/MS in E&E or related field with 7+ years of experience
  • A proven history of technical leadership
  • Verilog and/or SystemVerilog experience
  • ASIC development experience
7

Responsibilities For Junior Asic Design Engineer Resume

  • Highly experienced and deep knowledge of IP and SoC design flows and methodologies (Lint, CDC, Synthesis, power)
  • Experience with UFS (MIPI+UNIPRO), PCIe, DDR, NAND I/F (advantage)
  • Industry experience in IC or FPGA development
  • Experience with ASIC digital design flow
  • Experience in mixed signal ASIC design
  • Documenting and publishing results
8

Responsibilities For Senior Fpga / Asic Design Engineer Resume

  • Understanding of logic low power design techniques and clock gating concepts
  • Understanding of DSP concept/techniques including FFT, FIR/LMS, ECC
  • Working knowledge of MatLab and other scripting languages
  • Working knowledge of the definition of micro-architecture
  • Programming languages (C, C++, Java, …)
9

Responsibilities For Camera Asic Design Engineer Resume

  • Working with ASIC Design Team to design the Core Logic of the Assembly Code
  • Scripting with TCL, Perl, and Unix shell scripts
  • Working with back-end on block and full-chip implementation, including floorplanning, synthesis, timing closure and sign-off
  • Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog
  • Developing micro-architecture specifications for a next generation Computer Vision processor
  • Understanding of layout impacts and low power approaches an asset
  • Understanding of analog / digital ASIC design, tools and verification methodologies
  • Understanding of physical VLSI ASIC design methods and tools
  • Scripting languages and Programing (TCL, Python, Matlab, …)
10

Responsibilities For Senior Digital Asic Design Engineer Resume

  • Familiar with digital design flow, including RTL coding/simulation, synthesis, static timing analysis, and formality
  • Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes, 10%
  • Synthesis and closely working with physical design for timing closure
  • System/board level bring up, debugging and support,
  • Deliver production quality ATPG patterns to product engineering team, and provide pattern bring-up support on first silicon

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