SOC Design Engineer Resume Sample

4.8
14 votes
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Eden Swift
208 Lynch Extension,  Philadelphia,  PA
+1 (555) 820 8869

Work Experience


Lead SoC Design Engineer
07/2016 - PRESENT
Detroit, MI
  • Need to have OVM/SOALA coding and debug knowledge. Able to write tests and debug tests.- Understand Collage/Corekit/SOC environment and able to perform integration tasks.- Need to know how to use VCS/DVE and debug basic errors like Construct, Null Object, time 0 etc
  • System-on-chip RTL design integration, using in-house or external digital Ips
  • System-on-chip RTL integration verification, using both C-based directed tests and randomized UVM test environment
  • RTL design flow development
  • Participate to SoC integration/verification quality procedures and flow improvements
  • Experience in chip level design
  • Experience with memory subsystems, memory controllers and queueing
SOC Design Engineer
08/2013 - 03/2016
Detroit, MI
  • Solid experience in state of the art EDA tools (mainly Cadence and Synopsys)
  • Clear understanding of automotive microcontroller customer expectations
  • Perform HDL design, verification, and debug at both the unit and full-chip level
  • Participate in spec reviews, code reviews, coverage analysis, etc. in support of corporate ISO Quality Systems
  • The design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components
  • Performing developmental and/or test work, reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects
  • Knowledge of NAND Flash Memory Controller design with specifics of ECC design and integration
SOC Design Engineer Intern
11/2007 - 07/2013
Philadelphia, PA
  • Industry exposure to and knowledge of SoC design methodology, especially logic synthesis, static timing analysis, and logic equivalence checking
  • Experience with system design methodologies that contain multiple clock domains
  • Experience in low-power design issues, tools, and methodologies including UPF power intent specification highly desired
  • Scripting in Python, Perl or other language
  • BTech/MTech in ECE
  • MSEE/CE with 7+ years of hands-on design experience with complex IPs/SOCs- Strong background in SoC design methodology, fluent in System Verilog/Verilog- Hands on experience with industry or Intel equivalent tools for front-end development- Knowledge of high speed interfaces, fabric interconnect- Prior experience on DFT/DFD desired
  • Yrs of experience in VLSI
  • Good knowledge of microcontroller architectures

Education


Columbia University
2003 - 2007
Engineer's Degree in Electrical

Professional Skills


  • Strong communication skills verbal and written, teamwork skills, and can work effectively in a dynamic work environment
  • Excellent programming skills including Unix shell scripting and utilities (Perl, TCL, awk, grep, etc)
  • Strong problem-solving debugging skills
  • Strong coding skills in Perl, Python, or other industry-standard scripting languages
  • Prior experience in leading post-silicon efforts debug, validation etc.
  • Prioritize work and accomplish tasks quickly with good problem solving skills
  • Possesses strong analytical and debug skills

How to write SOC Design Engineer Resume

SOC Design Engineer role is responsible for design, physical, engineering, technology, integration, languages, eda, scripting, presentation, flow.
To write great resume for soc design engineer job, your resume must include:

  • Your contact information
  • Work experience
  • Education
  • Skill listing

Contact Information For SOC Design Engineer Resume

The section contact information is important in your soc design engineer resume. The recruiter has to be able to contact you ASAP if they like to offer you the job. This is why you need to provide your:

  • First and last name
  • Email
  • Telephone number

Work Experience in Your SOC Design Engineer Resume

The section work experience is an essential part of your soc design engineer resume. It’s the one thing the recruiter really cares about and pays the most attention to.
This section, however, is not just a list of your previous soc design engineer responsibilities. It's meant to present you as a wholesome candidate by showcasing your relevant accomplishments and should be tailored specifically to the particular soc design engineer position you're applying to. The work experience section should be the detailed summary of your latest 3 or 4 positions.

Representative SOC Design Engineer resume experience can include:

  • Excellent communication skills to interact with cross functional teams across sites and cultures to build consensus
  • + of scripting skills using Perl and Tcl
  • Programming experience in at least one, or more, of the following: VCS, VHDL, Verilog, SystemVerilog, TCL, Perl, Python
  • Good understanding on synthesis, PnR, Timing closure , FEV
  • Strong math background with proficiency in analysis, probability, statistical signal processing
  • Industry experience in chip design, specializing in SOC integration and design automation

Education on a SOC Design Engineer Resume

Make sure to make education a priority on your soc design engineer resume. If you’ve been working for a few years and have a few solid positions to show, put your education after your soc design engineer experience. For example, if you have a Ph.D in Neuroscience and a Master's in the same sphere, just list your Ph.D. Besides the doctorate, Master’s degrees go next, followed by Bachelor’s and finally, Associate’s degree.

Additional details to include:

  • School you graduated from
  • Major/ minor
  • Year of graduation
  • Location of school

These are the four additional pieces of information you should mention when listing your education on your resume.

Professional Skills in SOC Design Engineer Resume

When listing skills on your soc design engineer resume, remember always to be honest about your level of ability. Include the Skills section after experience.

Present the most important skills in your resume, there's a list of typical soc design engineer skills:

  • Good communication skills in writing and speaking English
  • Good scripting skills in TCL/Perl/Shell to automate tool/flow methodologies
  • Excellent communication skills, both verbal and written, are highly valued
  • Experience with scripting languages e.g. Perl, shell , Python and knowledge of UVM/OVM techniques is good to have is highly desirable
  • Domain experience out of which 2+ years of recent hands-on verification experience using SystemVerilog and OVM/UVM
  • ARM Microprocessor / Microcontroller experience is strongly prefered

List of Typical Experience For a SOC Design Engineer Resume

1

Experience For IP / SOC Design Engineer Resume

  • Strong leadership skills with ability to mentor junior designers
  • Performing static and formal checks (lint, clock domain crossing, etc.) to ensure the design meets NXP quality and coding standards
  • Programming in C/C++, Matlab required for scientific simulation and modelling
  • Synthesizing HDL and optimizing logic designs to meet area, power and performance targets
  • Analyzing post-layout results to identify performance bottlenecks, test coverage issues, power optimization and area saving opportunities
2

Experience For Lead SoC Design Engineer Resume

  • ECC code construction and performance evaluation
  • Analog signal specific requirements/checks
  • Assist in the preparation of the full-chip layout design database for introduction
  • Define module interfaces/formats for simulation
  • Perform Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
  • Experience with one or more of the following: Synopsys/Cadence SoC design tools, flows and methodology ICCDP, Design Compiler, IC Compiler/ICC, Primetime, clock tree synthesis
  • Perform HDL verification, and debug at both the unit and full-chip level
3

Experience For Senior SoC Design Engineer Resume

  • Work as part of a team and collaborate in a high-paced atmosphere
  • Provide technical direction to the team and influence project execution and methodology
  • Create/contribute to verification test plans
  • Understand the architecture and design of the verification environment in OVM/UVM and create components used by test environment
  • Develop/run/debug tests and functional coverage in SystemVerilog
  • Participate in code review process and provide/implement feedback
4

Experience For HW SoC Design Engineer Resume

  • Participate in func coverage, code coverage reviews and provide/implement feedback
  • Able to use automation and productivity tools to maximize impact on overall schedule
  • Track progress to achieve goals timely
  • Contribute to the development and maintenance of long term design verification strategy
  • Be able to work with teams across geos
5

Experience For SoC Design Engineer Validation Resume

  • Defining and writing IP/SoC verification and validation plans based on requirements documents (industry standards, product requirements, SoC/IP architecture and SoC/IP implementation specifications)
  • Proven ability to solve digital design problems in a complex environment
  • Strong orientation for continuous improvement and methodology development though design flow excellence
  • Developing and maintaining portions of a design environment including scripts and Make files
  • Course work completed in SOC design including digital logic design, test concepts and verification methods
6

Experience For AMP SoC Design Engineer Resume

  • General knowledge of high performance memory interfaces, graphics processing, clock systems is desirable
  • Front end design processes & flows, System Verilog / OOP
  • Exposure to DDRIO arch in DDRx/LPDDRx/HBMx/GDDRx memories
  • BS in in Electrical Engineering, Computer Engineering, or Electrical & Computer Engineering with 6+ years’ experience or a MS with 4+ years’ experience or a PhD with 2 years’ experience
  • Experience with design principles and techniques in at least two of: micro-architecture definition, RTL development, Validation development, and/or post-silicon test
7

Experience For Senior.soc Design Engineer Resume

  • BS in in Electrical Engineering, Computer Engineering, or Electrical & Computer Engineering with 4+ years’ experience or a MS with 3+ years’ experience or a PhD with 1 years’ experience
  • Industry experience in development of Digital designs & ASICs
  • Design and communicate complete micro-architectural designs
  • Deep knowledge of computer architecture and the inter-action between HW and SW
  • System Verilog / OOP
8

Experience For SoC Design Engineer Full Chip Timing Resume

  • RTL design Verilog, verification
  • Synthesis and DFT concepts
  • Verilog / System Verilog RTL design
  • Knowledge in Cadence/Mentor simulation suite
  • MCU embedded software development (C-based)
  • Working effectively with other design teams (Architecture, IP development, Design Integration, APR Team), as well as other engineering teams (Product Engineering, Applications)
9

Experience For Principal SoC Design Engineer Resume

  • Capability to work and exchange efficiently with multiple design sites worldwide (US, India)
  • Developing new scenarios to verify the functionally of IP in SOC. This includes documenting a test plan, coding test content or coverage points to validate the functionality of new architectural features of next generation designs
  • Circuit Design and VLSI

List of Typical Skills For a SOC Design Engineer Resume

1

Skills For IP / SOC Design Engineer Resume

  • Understanding of and experience with ASIC development
  • Experience on building testbench components of an Ethernet/MAC/Phy block in a switch chip
  • Good understanding and exposure of overall SoC Cycle
  • Experience with the following
  • FPGA development experience using Intel/Altera Quartus II software or Xilinx Vivado
2

Skills For Lead SoC Design Engineer Resume

  • Experience working with some or multiple layers of an IO protocol stack e.g. PCIe, Intel QPI/UPI, 802.3 Ethernet, SAS/SATA, USB is required
  • Experience in delivering IP to multiple external customers and SOCs
  • Experience with producing scripts for use by the team/project
  • Experience with design principles and techniques in at least two of the following areas
  • Hands-on experience in Full-chip ASIC verification through Static Timing Analysis (STA) and Performance Verification for tape-in
3

Skills For Senior SoC Design Engineer Resume

  • Experience with System-on-chip design and verification
  • Experience with ARM/MIPS processor based subsystems
  • Hands-On experience with domain relevant industry standard tools like ICC, Primetime, Redhawk, ICV, Calibre, Conformal, Spyglass-LP, Power Artist Etc
  • BSEE/MSEE and at least 10+ years’ experience with the following
  • Experience with UNIX, Perl and TCL also desired in order to implement usable, flexible C-shell/ Perl/ TCL programs that automate tool/flow methodologies
  • Experience with emulation platforms
  • Experience with Analog circuit design and/or Automation is helpful
4

Skills For HW SoC Design Engineer Resume

  • Layout cleanup experience DRCs, density, ipc, etc. is desirable
  • Knowledge & experience with SystemVerilog
  • Experience with VLSI design principles in SOC and back-end design and/or integration
  • Experience in Front End development or related areas
  • Good track record of execution in Pre-Si Val environments
  • Experience with Windows and MS Office Programs
  • Verifying digital logic using industry standard simulation, static timing analysis and formal verification tools
5

Skills For SoC Design Engineer Validation Resume

  • Writing complex TCL code for timing constraints/exceptions/analysis and debug
  • Conducting Synthesis and Place & Route and Clock Tree Synthesis using Synopsys Design Compiler DCT and ICC/ICC2
  • Completing DFx (scan, tap etc.) fabric timing convergence
  • Performing Multiple Power Domain Analysis using standard Power Formats UPF/CPF
  • Developing next-generation SoC designs, including micro-architecture, RTL development and integration, circuit design, and back-end integration
  • Coding, verification, synthesis tools
  • Learning of IP interoperability in System Verilog, Verilog or other Hardware description language
6

Skills For AMP SoC Design Engineer Resume

  • Conducting Formal Equivalence Verification
  • Developing next-generation SoC designs, including micro-architecture and RTL development and integration
  • Developing automated tools or scripts for pre-silicon verification or integration environment
  • Developing new scripts, flows or tools to improve the efficiency of the design implementation methodology
  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, or Electrical & Computer Engineering
  • BS or MS in in Electrical Engineering, Computer Engineering, or Electrical & Computer Engineering
  • Expertise in Automating Flows/Scripting with Unix shell, Perl and TCL
7

Skills For Senior.soc Design Engineer Resume

  • Creative problem solving along the process of integrating an IP into SOC
  • Ownership of verification of block/cluster level testing or a significant feature set in a chip/subsystem level testing
  • Expertise in RTL Verification using Verilog/SystemVerilog
  • BSc in Electrical or Computer Engineering is required
  • Very Large Scale Integration VLSI Complementary MOS CMOS circuits and timing
  • Background in a combination of the following
  • Expertise in using Unix based systems
8

Skills For SoC Design Engineer Full Chip Timing Resume

  • Perl/python and other scripting or software languages for control of data and database environment
  • Self starting learner – can keep up to date on new technologies and products
  • BS or MS in Computer or Electrical Engineering
  • This includes resolving issues in RTL2GDS flow like, Logic synthesis, FEV, Block level floor-planning, multi-power domain complexities, Place & Route, clock tre synthesis complexities like balancing the clocks between multiple clocks, LVS & DRC cleanup, timing closure , Electrical Rule Fixes and Quality fixes
  • Seeking new methods for improving design efficiency (automation, scripting) and quality (reduced bugs after tapeout)
9

Skills For Principal SoC Design Engineer Resume

  • + Synthesis and Static Timing Analysis STA with Design Compiler and Primetime
  • Logic simulation tools such as Modelism and VCSPCIe, NVMe, SAS/SATA and Nonvolatile media
  • + Random constrained, coverage driven verification
  • + Object Oriented Analysis and Design-Embedded Firmware
  • RTL Logic Design experience, vast knowledge on SystemVerilog/VHDL- Experience with High speed, Low Power Designs and Implementation Technique, knowledge of UPF and Power Intent Verification
  • Proficiency in Front End Tools and Methodologies.- Experience in authoring Micro-Architecture/Design Specifications and Converting them to Design. - Perform Front End Integration tasks including: Lint, CDC, Synthesis, and ECO
  • Experience with Multiple Clock Domains and Asynchronous Interfaces.- Experience in DFT Methodologies and Formal Verification Tools.- Familiarity with Scripting Languages like Gmake/Perl/Tcl/Python
10

Skills For Low Power SoC Design Engineer Resume

  • Verilog and/or SystemVerilog experience
  • ASIC development experience
  • Experience with PCI Express interface protocol
  • Advanced computer architecture, VLSI Design, communications theory, and/or micro-architecture design concepts
  • SOC design and integration

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