Asic Digital Design Engr Resume Sample
Berneice Tromp
54915 Stokes Cliffs,
Boston,
MA
+1 (555) 802 8692
Work Experience
Asic Digital Design Engr, Senior
11/2017
-
PRESENT
Dallas, TX
- Aptitude to work in the VLSI domain,
- Strong Digital Design skills,
- Good analysis, debug and problem solving skills,
- Understanding of design/verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera
- Knowledge of one or more of protocols: AMBA (AMBA2, AXI)/ MIPI/Ethernet/USB/SD-MMC/
- Domain knowledge of protocols sata/pcie/usb/ethernet is a significant advantage
- Self motivated, hard working and innovative in bringing solutions to complex problems
- Understand the system level scenarios & converting them to verification scenarios
Asic Digital Design Engr
04/2014
-
06/2017
Detroit, MI
- Be responsible for Synthesis, floor planning, place and route, clock tree synthesis, and timing closure on complex IP design at block and SoC level
- Develop plans and execute on the physical implementation including Design-for-test (DFT) features
- Define and review synthesis constraints, analyze timing report, coordinate RTL design change and timing closure
- Design and implement comprehensive script (Shell/Perl/Tcl) to manage and maintain Synthesis flow, Static Timing analysis, and DFT flow
- Own the critical interface to the Memory Model VIP team and work closely with them to ensure the memory models meet the current and future DDR PHY requirements
- Create verification test plans based on firmware feature requirements
- Develop the required test benches and test cases required to implement the test plan
Education
Missouri University of Science and Technology
2008 - 2013
Engineer's Degree in Engineering
Professional Skills
- Hardware validation and debugging or IP or ASIC design UVM verification skill or experiences are highly desirable
- Excellent communication skills and comfortable interfacing with internal teams and customers
- Strong verbal and written communication skills for global teams and customer communication
- Strong verbal and written communication skills for global teams and customers communication
- Strong Verilog, system Verilog, PERL, and TCL skills
- Prior ASIC/IP directed verification skills with essential knowledge of Verilog/ System Verilog
- Demonstrates good communication skills in English
How to write Asic Digital Design Engr Resume
Asic Digital Design Engr role is responsible for design, automation, modeling, analysis, coding, debugging, english, circuits, documentation, digital.
To write great resume for asic digital design engr job, your resume must include:
- Your contact information
- Work experience
- Education
- Skill listing
Contact Information For Asic Digital Design Engr Resume
The section contact information is important in your asic digital design engr resume. The recruiter has to be able to contact you ASAP if they like to offer you the job. This is why you need to provide your:
- First and last name
- Telephone number
Work Experience in Your Asic Digital Design Engr Resume
The section work experience is an essential part of your asic digital design engr resume. It’s the one thing the recruiter really cares about and pays the most attention to.
This section, however, is not just a list of your previous asic digital design engr responsibilities. It's meant to present you as a wholesome candidate by showcasing your relevant accomplishments and should be tailored specifically to the particular asic digital design engr position you're applying to.
The work experience section should be the detailed summary of your latest 3 or 4 positions.
Representative Asic Digital Design Engr resume experience can include:
- Good skills in scripting and automation
- Good organization and communication skills for interacting between different design groups and customer support teams
- Solid analysis and problem-solving skills
- A proactive team player with good written and verbal communication skills
- Experience with at least 1 year experience in developing the IP package release flow
- Creative and flexible personality with customer facing skills.Networks with senior internal and external personnel in own area of expertise
Education on an Asic Digital Design Engr Resume
Make sure to make education a priority on your asic digital design engr resume. If you’ve been working for a few years and have a few solid positions to show, put your education after your asic digital design engr experience. For example, if you have a Ph.D in Neuroscience and a Master's in the same sphere, just list your Ph.D. Besides the doctorate, Master’s degrees go next, followed by Bachelor’s and finally, Associate’s degree.
Additional details to include:
- School you graduated from
- Major/ minor
- Year of graduation
- Location of school
These are the four additional pieces of information you should mention when listing your education on your resume.
Professional Skills in Asic Digital Design Engr Resume
When listing skills on your asic digital design engr resume, remember always to be honest about your level of ability. Include the Skills section after experience.
Present the most important skills in your resume, there's a list of typical asic digital design engr skills:
- Solid written and verbal communication skills and the ability to create clear and concise documentation
- 1) Prior experience of developing assembly coding for ARC/some custom processors
- Continuous process improvement & automation using perl/tcl or other methods is good skill to have
- 2) prior experience in IP release flow
- BSEE or MSEE (is preferable) with 3+ yrs of experiences in FPGA design and IC validation
- BSEE or MSEE (is preferable) with 1+ yrs of experiences in FPGA design and IC validation
List of Typical Experience For an Asic Digital Design Engr Resume
1
Experience For Asic Digital Design Engr, Senior Resume
- BS with 6 - 8 yrs relevant experience. MS with 5+ yrs relevant experience
- Integrate the testbench in an in-house release tool/infrastructure with customer-friendly interface to improve customer user experiences
- Strong background in processor architectures
- MSc (or equivalent) in Electrical or Computer Science with 8+ years of experience
- Hands-on experience in ASIC physical design, STA, LVS
- B.Tech/M.Tech with at least 1+ years experience in micro-architecture and RTL development of complex blocks
- B.Tech/M.Tech with at least 2+ years experience in micro-architecture and RTL development of complex blocks
- Deep knowledge and experience in RISC microprocessor architecture
2
Experience For Asic Digital Design Engr Resume
- Excellent grasp of RTL design (Verilog or VHDL)
- Good demonstration of enthusiasm, drive and diligence
- Significant proven RTL design expertise of complex hardware IP components
- Support silicon validation
- Experience with Verilog
- Running the RTL/netlist regressions and debugging of failures
3
Experience For Asic Digital Design Engr, Senior Resume
- Defining place and route constraints, supporting place-and-route team to debug STA issues
- Writing directed verilog and possibly system-verilog test-benches. Performing functional coverage, assertion coverage, and code coverage
- Writing unit tests and debugging of the design
- Interacting with customer support and back-end design teams
- Working knowledge of of Verilog and SystemVerilog
- Writing technical documentation and presentations on developed Hardware FPGA prototypes
4
Experience For Asic Digital Design Engr Resume
- Writing verilog and system-verilog test-benches
- Understanding of UVM verification methodology
- Understanding of DDR/LPDDR/HBM memory standards is essential
- Working knowledge of C would be an asset
- Working knowledge of: On chip buses like AMBA, SoC design, Memory interface such as DRAM,
- Interacting with engineers from the analog, customer support and physical implementation teams
- Creating technical documentation and product collateral
5
Experience For Asic Digital Design Engr, Senior Resume
- Interacting with verification and back-end design teams
- Synthesis, Defining place and route constraints, resolving STA issues and performing gate-level simulations
- Familiarity with analog modeling of custom analog and digital circuits, and understanding of impact on simulations speed vs modeling accuracy
- RTL coding of high-speed digital circuits, modeling of analog blocks
- Detail oriented; ability to multitask through planning/organizing
- Exposure to scripting for post processing of simulation results (i.e. TCL, PERL, MATLAB etc…)
6
Experience For Asic Digital Design Engr Resume
- 2) Coding for multiple interrupt handling
- Create deep understanding of specific leading-edge application domains selected for ARC processor acceleration
- Basic knowledge of digital hardware design including activities such as RTL development, functional simulation, synthesis, timing analysis
- Execute the test plan, debug any resulting failures and collect verification metrics
- Assist in the firmware integration, debug and hardware bring up
- Familiarity with scripting languages such as shell/Perl/Python etc. is highly desirable
- Lead and/or assist with the planning, co-ordination and execution of functional specifications for complex IP Subsystems
7
Experience For Asic Digital Design Engr, Senior Resume
- Domain knowledge of one or more of the following protocols
- Knowledge in either of the following
- Possess overall understanding of the FPGA design process and implementation in Xilinx/Altera FPGA families
- Hands on with one/more verification methodologies (UVM/OVM/VMM ...), Shell/Perl Scripting
- Participate in complex block and/or chip planning and architecture studies
- Participate in the implementation of mixed-signal blocks using Verilog
- Participate in the development of verification environments using top of the edge methodologies: System Verilog, VMM and UVM
- Perform RTL and gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied
- Work towards improving efficiency in design procedures and methodologies
8
Experience For Asic Digital Design Engr Resume
- In-depth knowledge of digital circuit design using Verilog HDL, and synthesis constraints in DC and PT
- Familiarity with HDLs such as Verilog and scripting languages such as perl is highly desired
- Support of customer in IP integration, post silicon bringup and debug, answering technical questions
- Close timing with Physical Design team
- Execute FPGA prototyping of the designs
- Execute behavioral modeling
- Verification using internal or 3rd party VIP for the protocol of interest
- Review of real modeling techniques for filters, gain stages, DACs, etc in SV model of analog
9
Experience For Asic Digital Design Engr, Senior Resume
- Functional verification of new RTL hardware IP using state-of-the-art functional and performance verification methologies
- Basic understanding of architecture of microcontroller IC’s and RISC CPU / DSP
- FPGA based prototyping
- Develop and maintain infrastructure associated with the firmware verification environment
- Participate in the diagnosis of customer firmware related failures
- Knowledge of Verilog RTL, verification, IP deliverables, ASIC design flow and tools
- Knowledge of one or more of protocols: PCIe/Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI
10
Experience For Asic Digital Design Engr Resume
- Integrate digital controller and mixed signal physical layer IPs
- Check design quality in LINT/CDC/RDC/DFT, synthesize design and do equivalence check
- Debug design in simulation and emulation
- Full understanding of digital design methodologies and tools including RTL coding in Verilog, simulation, synthesis, static timing analysis, and formal verification
- Integration of SecureIP cores in the software development kit flow
- Analysis of boards design and schematics
- Knowledge of Verilog hardware description language and verification methodologies
- Basic knowledge of ASIC and FPGA design flows is desirable
- Hands on experience in architecting and designing high-speed digital circuits in Verilog and/or System Verilog, writing test plans and familiarity with code quality metrics
List of Typical Skills For an Asic Digital Design Engr Resume
1
Skills For Asic Digital Design Engr, Senior Resume
- Good understanding of ASIC digital design flow with hands-on experience in at least two of the below domains
- Creative and flexible personality with customer facing skills. Networks with senior internal and external personnel in own area of expertise
- Proven experience with customer interfacing and collaborative teamwork
- Have prior knowledge of and experience in ASIC design and associated development environments
- B.Tech/M.Tech with at least 7+ years experience in micro-architecture and RTL development and verification/validation of complex blocks
- Communicate effectively with other team members
2
Skills For Asic Digital Design Engr Resume
- BS in EE with 5+ years of relevant experience or MS with 3+ years of relevant experience in the verification of IP cores and/or SOC RTL designs
- BS in EE with 2+ years of relevant experience or MS with 1+ years of relevant experience in the verification of IP cores and/or SOC RTL designs
- BS in EE with 5+ years of relevant experience or MS with 4+ years of relevant experience in the verification of IP cores and/or SOC RTL designs
- BS in EE with 8+ years of relevant experience or MS with 3+ years of relevant experience in the verification of IP cores and/or SOC RTL designs
- Prior knowledge and experience of CAD tool & UNIX environment for development are required
3
Skills For Asic Digital Design Engr, Senior Resume
- Prior knowledge and experience of CAD tool for development are required
- Scripting experience with Perl, Python, or Bash would be an asset
- Working knowledge and experience on memory interface protocols (DDR, LPDDR) is desirable but not required
- Support silicon validation including testchip characterization or FPGA based prototyping
- Strong motivation for learning and exploring new technologies
4
Skills For Asic Digital Design Engr Resume
- Good understanding of PCIe,usb, sata, protocols
- 2) Strong understanding of assertion based verification, code & functional coverage
- Perform FPGA synthesis, define correct timing constraints, IO constraints to achieve good synthesis result
- Hands on experience of writing block level test-benches in Verilog or System Verilog
- Good working knowledge of Verilog or VHDL
- Good working knowledge of System Verilog or VMM or OVM or UVM
- Hands-on experience using Synopsys physical design tools (Design Compiler, ICC/ICC2, Primetime)
- Experience with scripting in Shell, Tcl, and Perl
- Support silicon validation including testchip characterization
5
Skills For Asic Digital Design Engr, Senior Resume
- Strong understanding of ASIC digital design flow with expertise in below domains
- Experience in RTL development using Verilog/System Verilog
- Experiences with timing/Synthesis constraints and floorplan-aware synthesis
- Experience designing ASICs in an industrial environment is required
- Hands on experience with System Verilog/UVM coding and Simulation tools; Knowledge of C++/ OOPs Concepts
- Hardware test and debugging experiences are highly desirable
- Hands on experience with Verilog/System Verilog coding and Simulation tools; Knowledge of C++/ OOPs Concepts
- Experience in producing high-quality technical documentation
6
Skills For Asic Digital Design Engr Resume
- Hands on experience with Verilog coding and Simulation tools
- BS or MS in EE with 3+ years of hands-on experience developing high-speed digital IP cores and/or SOCs
- Good understanding of design for synthesis to achieve specified power, frequency, and area targets
- Good knowledge of programming at assembly and C/C++ level
- Guide junior colleagues technically wrt design and methodology aspects to bring out good quality work from overall team
- 0~ 2 years in custom circuit design experience
- In custom circuit design experience
- Experience of System Verilog, VMM or OVM
7
Skills For Asic Digital Design Engr, Senior Resume
- Have 5+ years of related experience
- Possess a strong desire to learn and explore new technologies
- Experience with high speed Interface IPs such as USB3.1, PCI Express, ..
- Experience in ASIC RTL design and verification at the chip level and block level
- Good synthesis and STA background
- Verification experience of ASIC interface design or SoC
- Experiences with DFT and ATPG
- Review SERDES / PHY / Controller IP specification & validate compliance to protocol of interest
8
Skills For Asic Digital Design Engr Resume
- BSCS or BSCE with 10+ years of SOC verification experience
- BSCS or BSCE with 3+ years of SOC verification experience
- Experience with System Verilog verification environments
- Strong advocate for structured verification and documentation processes
- Self-motivated and strong interest in software development and SOC verification
9
Skills For Asic Digital Design Engr, Senior Resume
- BSCS or BSCE with 5+ years of SOC verification experience
- Experience in Verilog/VHDL. Knowledge of SystemVerilog or VMM or OVM or UVM would be advantageous
- BS/MS in EE with 5+ years of relevant experience in the verification of IP cores and/or SOC
- Experience with one of the verification methodologies such as UVM/VMM/OVM/eRm is required
- Has a strong desire to learn and explore new technologies
- Strong desire to learn and explore new technologies
10
Skills For Asic Digital Design Engr Resume
- Hardware validation project in FPGA of SecureIP products
- Has strong desire to learn and explore
- Previous professional experience is valued but is not required
- BSEE or MSEE with at least 5 to 7 years of industry digital design experience
- Supporting timing closure by providing constraints, clock tree spec, helping out on critical paths required. Clock speed in design is upto 3GHz
- Defining place and route constraints, resolving STA timing issues and performing gate-level simulations
- Defining and debugging DFT structures in the hard-macro designs for obtaining high DFT coverage
- Operating and debugging High-speed digital designs with test equipment’s
- Defining detailed test plan and supporting verification team with debug
List of Typical Responsibilities For an Asic Digital Design Engr Resume
1
Responsibilities For Asic Digital Design Engr, Senior Resume
- Adhere to implemented development flows for RTL design, functional simulation, timing and power analysis, gathering data and achieving quality targets
- Willingness to be part of a geographically spread team working on cutting-edge technology
- Lead and manage engineering teams at off-site locations
- Hands on experience in designing high-speed digital circuits, writing complex test-cases in Verilog and System Verilog, and familiarity with code quality metrics
- Working knowledge of high speed interface protocols such as HBM, DDR, DFI
- Participate in evaluation and troubleshooting of digital and mixed signal designs
- Develop customer-facing testbench and tests
- Participate in evaluation, troubleshooting and debug of digital and mixed signal designs
- Support PHY integration, silicon bring-up, and silicon debug activities
2
Responsibilities For Asic Digital Design Engr Resume
- Participate in evaluation and troubleshooting of digital and mixed signal circuits
- Knowledge of Scripting : Perl/Tcl is an advantage
- Builds routine working relationships internally
- HDL and Verification languages: System Verilog, Verilog
- Generates documentation for test plans, verification environments, and usage guide
3
Responsibilities For Asic Digital Design Engr, Senior Resume
- Participate in the generation of data books, application notes, and white papers
- Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of the design with medium complexity
- Generate or contribute to high quality documentation targeting different audiences: customer consumable and to support design implementation and verification
- Define, implement and support verification of semiconductor integrated digital and mixed signal circuits
- Participate in architecture design exploration, logic design and verification. Elaborate design and verification specifications
- Knowledge of HDL languages (Verilog / SystemVerilog) and IC design flows
- Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create architecture and micro-architecture with detailed design documents for some of the components of the design for medium to high complexity functionality
- Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debug, verification coverage improvement in directed Verilog test environment, if needed, etc
4
Responsibilities For Asic Digital Design Engr Resume
- Knowledge of one or more of protocols: MIPI-UFS/Unipro/ SD-MMC/Ethernet/USB/AMBA (AMBA2, AXI)
- Knowledge of one or more of protocols: DDR/Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI
- Knowledge of Perl/Shell scripts and regression environment creation, management and analysis is a key advantage
- Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as DDR / AMBA (AMBA2, AXI)/ MIPI / Others
- Generate timing constraints for synthesizable designs
- Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied
5
Responsibilities For Asic Digital Design Engr, Senior Resume
- Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied
- Documentation of functionality, code, verification environments/plans, and design procedures
- Read technical papers and related material to keep abreast of industry progress
- Generates verification specifications
- Verification methodologies: UVM/OVM
6
Responsibilities For Asic Digital Design Engr Resume
- Write patents for any inventions
- Exposure to verification methodologies such as RVM/VMM/OVM/UVM/eRm is desirable
- Defines, develops, and verifies semiconductor integrated circuit digital and mixed signal circuits
- Generates design and verification specifications. Determines architecture design, logic design, test bench design, and test cases
- Defines module interfaces and formats
7
Responsibilities For Asic Digital Design Engr, Senior Resume
- Generates documentation for circuit development, test plans, verification environments, and usage
- Contacts are primarily with direct manager and other peers in the group or department
- Knowledge of FPGA architectures such as Xilinx/Altera families for best utilization of design requirements would be an advantage
- HW board designs of minor complexity
- Knowledge of Verilog and SystemVerilog
- Be able to travel periodically
- Knowledge of Design for Verification and Design for Test
- 4) Any one of verification methodologies UVM/VMM/OVM
- 3) process development experence for IP release flow
8
Responsibilities For Asic Digital Design Engr Resume
- 4) Need to communicate with reportees & with management in different geographical locations
- 5) Experiecne in the range of 7-14 years
- Knowledge of the IP development process and tools
- SV verification of SERDES / PHY IPs internally developed. Responsibility includes -
- Perform mixed signal simulations (Analog + Digital)
- Documentation of design and verification environments/plans and overall procedures
- Familiarity with high-speed CDR architectures and hardware implications
- Knowledgeable in DFT concepts like, scan, at-speed scan, ATE
- Knowledgeable in DFT concepts like, scan, at-speed scan
9
Responsibilities For Asic Digital Design Engr, Senior Resume
- Knowledgeable in asynchronous design concepts, CDC and RDC issues and familiarity with tools like Spyglass
- Design customization features
- Hands on SV UVM expertise
- To define (micro)architecture specification and implement RTL design of microprocessors
- To optimize designs for performance, speed, size and power
- To work closely with verification team and contribute to verification strategy and help in debug fails
10
Responsibilities For Asic Digital Design Engr Resume
- To provide technical leadership to a team of CPU hardware design engineers Requirements
- Familiar with EDA tools such as, VCS, VERDI, SPYGLASS, etc
- Keen to work in a multi-site global development team
- Participate in the definition of functional specifications
- Participate in the discussions/reviews of the regression results to improve the correct and efficiency of the ATPG and DFx flow
- Verification plan development and review
- RTL, GLS & Co-simulations & coverage closure
- Deliver high quality RTL and other simulation models to customer
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